Ultra Start 16xx Bedienungsanleitung Seite 18

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MEB/0404
© 2004 Texas Instruments Inc, Slide 18
12-bits DACs + DMA Completes SCoC
Two 12-bit DACs
Three DMA Channels
DAC12_0
Timer_B
Timer_A
Group
Load
Software
DAC12_1
DMA0
2 MCLK
DAC12
External
DMAREQ
DMA2
Timer_A
Timer_B
ADC12
USART0
USART1
MPY
DMA1
DMA2
Complete
Address
Space
The DAC12 module is a 12-bit, R-ladder, voltage output DAC.
•The DAC12 can be configured in 8- or 12-bit mode and may be used in conjunction with the DMA
controller. Multiple DAC12 modules may be grouped together for synchronous update operation.
Features of the DAC12 include:
•12-bit monotonic output
•Programmable settling time vs power consumption
•Internal or external reference selection
•Straight binary or 2’s compliment data format
•Self-calibration option for offset correction
•Multiple DAC12 modules can be grouped for simultaneous update
•8- or 12-bit voltage output resolution
The direct memory access (DMA) controller transfers data from one address to another without
CPU intervention across the entire address range.
The DMA offers a significant performance boost relieving the CPU from basic data handling allowing more
advanced applications at lower power and using less code.
The DMA controller features include:
•Three independent transfer channels
•Configurable DMA channel priorities
•Requires only two MCLK clock cycles
•Byte or word and mixed byte/word transfer capability
•Block sizes up to 65535 bytes or words
•Configurable transfer trigger selections
•Selectable edge or level-triggered transfer
•Four transfer-addressing modes
•Single, block, or burst-block transfer modes
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